p: file format elf64-x86-64 Disassembly of section .init: 0000000000400760 <_init>: 400760: 48 83 ec 08 sub $0x8,%rsp 400764: e8 63 01 00 00 callq 4008cc 400769: e8 c2 01 00 00 callq 400930 40076e: e8 1d 06 00 00 callq 400d90 <__do_global_ctors_aux> 400773: 48 83 c4 08 add $0x8,%rsp 400777: c3 retq Disassembly of section .plt: 0000000000400778 <__libc_start_main@plt-0x10>: 400778: ff 35 4a 0a 10 00 pushq 1051210(%rip) # 5011c8 <_GLOBAL_OFFSET_TABLE_+0x8> 40077e: ff 25 4c 0a 10 00 jmpq *1051212(%rip) # 5011d0 <_GLOBAL_OFFSET_TABLE_+0x10> 400784: 90 nop 400785: 90 nop 400786: 90 nop 400787: 90 nop 0000000000400788 <__libc_start_main@plt>: 400788: ff 25 4a 0a 10 00 jmpq *1051210(%rip) # 5011d8 <_GLOBAL_OFFSET_TABLE_+0x18> 40078e: 68 00 00 00 00 pushq $0x0 400793: e9 e0 ff ff ff jmpq 400778 <_init+0x18> 0000000000400798 : 400798: ff 25 42 0a 10 00 jmpq *1051202(%rip) # 5011e0 <_GLOBAL_OFFSET_TABLE_+0x20> 40079e: 68 01 00 00 00 pushq $0x1 4007a3: e9 d0 ff ff ff jmpq 400778 <_init+0x18> 00000000004007a8 : 4007a8: ff 25 3a 0a 10 00 jmpq *1051194(%rip) # 5011e8 <_GLOBAL_OFFSET_TABLE_+0x28> 4007ae: 68 02 00 00 00 pushq $0x2 4007b3: e9 c0 ff ff ff jmpq 400778 <_init+0x18> 00000000004007b8 : 4007b8: ff 25 32 0a 10 00 jmpq *1051186(%rip) # 5011f0 <_GLOBAL_OFFSET_TABLE_+0x30> 4007be: 68 03 00 00 00 pushq $0x3 4007c3: e9 b0 ff ff ff jmpq 400778 <_init+0x18> 00000000004007c8 : 4007c8: ff 25 2a 0a 10 00 jmpq *1051178(%rip) # 5011f8 <_GLOBAL_OFFSET_TABLE_+0x38> 4007ce: 68 04 00 00 00 pushq $0x4 4007d3: e9 a0 ff ff ff jmpq 400778 <_init+0x18> 00000000004007d8 : 4007d8: ff 25 22 0a 10 00 jmpq *1051170(%rip) # 501200 <_GLOBAL_OFFSET_TABLE_+0x40> 4007de: 68 05 00 00 00 pushq $0x5 4007e3: e9 90 ff ff ff jmpq 400778 <_init+0x18> 00000000004007e8 : 4007e8: ff 25 1a 0a 10 00 jmpq *1051162(%rip) # 501208 <_GLOBAL_OFFSET_TABLE_+0x48> 4007ee: 68 06 00 00 00 pushq $0x6 4007f3: e9 80 ff ff ff jmpq 400778 <_init+0x18> 00000000004007f8 : 4007f8: ff 25 12 0a 10 00 jmpq *1051154(%rip) # 501210 <_GLOBAL_OFFSET_TABLE_+0x50> 4007fe: 68 07 00 00 00 pushq $0x7 400803: e9 70 ff ff ff jmpq 400778 <_init+0x18> 0000000000400808 : 400808: ff 25 0a 0a 10 00 jmpq *1051146(%rip) # 501218 <_GLOBAL_OFFSET_TABLE_+0x58> 40080e: 68 08 00 00 00 pushq $0x8 400813: e9 60 ff ff ff jmpq 400778 <_init+0x18> 0000000000400818 : 400818: ff 25 02 0a 10 00 jmpq *1051138(%rip) # 501220 <_GLOBAL_OFFSET_TABLE_+0x60> 40081e: 68 09 00 00 00 pushq $0x9 400823: e9 50 ff ff ff jmpq 400778 <_init+0x18> 0000000000400828 : 400828: ff 25 fa 09 10 00 jmpq *1051130(%rip) # 501228 <_GLOBAL_OFFSET_TABLE_+0x68> 40082e: 68 0a 00 00 00 pushq $0xa 400833: e9 40 ff ff ff jmpq 400778 <_init+0x18> 0000000000400838 : 400838: ff 25 f2 09 10 00 jmpq *1051122(%rip) # 501230 <_GLOBAL_OFFSET_TABLE_+0x70> 40083e: 68 0b 00 00 00 pushq $0xb 400843: e9 30 ff ff ff jmpq 400778 <_init+0x18> 0000000000400848 : 400848: ff 25 ea 09 10 00 jmpq *1051114(%rip) # 501238 <_GLOBAL_OFFSET_TABLE_+0x78> 40084e: 68 0c 00 00 00 pushq $0xc 400853: e9 20 ff ff ff jmpq 400778 <_init+0x18> 0000000000400858 : 400858: ff 25 e2 09 10 00 jmpq *1051106(%rip) # 501240 <_GLOBAL_OFFSET_TABLE_+0x80> 40085e: 68 0d 00 00 00 pushq $0xd 400863: e9 10 ff ff ff jmpq 400778 <_init+0x18> 0000000000400868 : 400868: ff 25 da 09 10 00 jmpq *1051098(%rip) # 501248 <_GLOBAL_OFFSET_TABLE_+0x88> 40086e: 68 0e 00 00 00 pushq $0xe 400873: e9 00 ff ff ff jmpq 400778 <_init+0x18> 0000000000400878 : 400878: ff 25 d2 09 10 00 jmpq *1051090(%rip) # 501250 <_GLOBAL_OFFSET_TABLE_+0x90> 40087e: 68 0f 00 00 00 pushq $0xf 400883: e9 f0 fe ff ff jmpq 400778 <_init+0x18> 0000000000400888 : 400888: ff 25 ca 09 10 00 jmpq *1051082(%rip) # 501258 <_GLOBAL_OFFSET_TABLE_+0x98> 40088e: 68 10 00 00 00 pushq $0x10 400893: e9 e0 fe ff ff jmpq 400778 <_init+0x18> Disassembly of section .text: 00000000004008a0 <_start>: 4008a0: 31 ed xor %ebp,%ebp 4008a2: 49 89 d1 mov %rdx,%r9 4008a5: 5e pop %rsi 4008a6: 48 89 e2 mov %rsp,%rdx 4008a9: 48 83 e4 f0 and $0xfffffffffffffff0,%rsp 4008ad: 50 push %rax 4008ae: 54 push %rsp 4008af: 49 c7 c0 80 0d 40 00 mov $0x400d80,%r8 4008b6: 48 c7 c1 f0 0c 40 00 mov $0x400cf0,%rcx 4008bd: 48 c7 c7 e8 0a 40 00 mov $0x400ae8,%rdi 4008c4: e8 bf fe ff ff callq 400788 <__libc_start_main@plt> 4008c9: f4 hlt 4008ca: 90 nop 4008cb: 90 nop 00000000004008cc : 4008cc: 48 83 ec 08 sub $0x8,%rsp 4008d0: 48 8b 05 e1 08 10 00 mov 1050849(%rip),%rax # 5011b8 <_DYNAMIC+0x190> 4008d7: 48 85 c0 test %rax,%rax 4008da: 74 02 je 4008de 4008dc: ff d0 callq *%eax 4008de: 48 83 c4 08 add $0x8,%rsp 4008e2: c3 retq 4008e3: 90 nop 4008e4: 90 nop 4008e5: 90 nop 4008e6: 90 nop 4008e7: 90 nop 4008e8: 90 nop 4008e9: 90 nop 4008ea: 90 nop 4008eb: 90 nop 4008ec: 90 nop 4008ed: 90 nop 4008ee: 90 nop 4008ef: 90 nop 00000000004008f0 <__do_global_dtors_aux>: 4008f0: 80 3d 81 09 10 00 00 cmpb $0x0,1051009(%rip) # 501278 <__bss_start> 4008f7: 55 push %rbp 4008f8: 48 89 e5 mov %rsp,%rbp 4008fb: 74 10 je 40090d <__do_global_dtors_aux+0x1d> 4008fd: eb 24 jmp 400923 <__do_global_dtors_aux+0x33> 4008ff: 90 nop 400900: 48 83 c0 08 add $0x8,%rax 400904: 48 89 05 65 09 10 00 mov %rax,1050981(%rip) # 501270 40090b: ff d2 callq *%edx 40090d: 48 8b 05 5c 09 10 00 mov 1050972(%rip),%rax # 501270 400914: 48 8b 10 mov (%rax),%rdx 400917: 48 85 d2 test %rdx,%rdx 40091a: 75 e4 jne 400900 <__do_global_dtors_aux+0x10> 40091c: c6 05 55 09 10 00 01 movb $0x1,1050965(%rip) # 501278 <__bss_start> 400923: c9 leaveq 400924: c3 retq 400925: 66 data16 400926: 66 data16 400927: 66 data16 400928: 90 nop 400929: 66 data16 40092a: 66 data16 40092b: 66 data16 40092c: 90 nop 40092d: 66 data16 40092e: 66 data16 40092f: 90 nop 0000000000400930 : 400930: 55 push %rbp 400931: 48 83 3d e7 06 10 00 cmpq $0x0,1050343(%rip) # 501020 <__JCR_END__> 400938: 00 400939: 48 89 e5 mov %rsp,%rbp 40093c: 74 16 je 400954 40093e: b8 00 00 00 00 mov $0x0,%eax 400943: 48 85 c0 test %rax,%rax 400946: 74 0c je 400954 400948: bf 20 10 50 00 mov $0x501020,%edi 40094d: 49 89 c3 mov %rax,%r11 400950: c9 leaveq 400951: 41 ff e3 jmpq *%r11d 400954: c9 leaveq 400955: c3 retq 400956: 90 nop 400957: 90 nop ================== http://msmvps.com/blogs/kernelmustard/archive/2004/09/20/13836.aspx In other words, if a program writes to memory location 1 and then reads from memory location 2, the read is allowed to hit the system bus before the write. This is because the execution stream inside the processor is usually totally blocked waiting for reads, whereas writes can be "queued" to the cache somewhat more asynchronously in the core without blocking program flow. The P6-based processors present a slightly different story, adding support for out-of-order writes of long string data and speculative read support. In order to control these features of the processor, Intel has supplied a few instructions to enforce memory ordering. There are three explicit fence instructions - LFENCE, SFENCE, and MFENCE. LFENCE - Load fence - all pending load operations must be completed by the time an LFENCE executes SFENCE - Store fence - all pending store operations must be completed by the time an SFENCE executes MFENCE - Memory fence - all pending load and store operations must be completed by the time an MFENCE executes. ================== 0000000000400958 : 400958: 55 push %rbp 400959: 48 89 e5 mov %rsp,%rbp 40095c: 8b 05 4a 09 10 00 mov 1050954(%rip),%eax # 5012ac 400962: 85 c0 test %eax,%eax 400964: 7e 32 jle 400998 400966: 48 8b 05 1b 09 10 00 mov 1050907(%rip),%rax # 501288 40096d: c6 00 01 movb $0x1,(%rax) 400970: 48 8b 05 09 09 10 00 mov 1050889(%rip),%rax # 501280 400977: c6 00 01 movb $0x1,(%rax) 40097a: 48 8b 05 2f 09 10 00 mov 1050927(%rip),%rax # 5012b0 400981: 0f b6 00 movzbl (%rax),%eax 400984: 3c 01 cmp $0x1,%al 400986: 75 40 jne 4009c8 400988: 48 8b 05 f1 08 10 00 mov 1050865(%rip),%rax # 501280 40098f: 0f b6 00 movzbl (%rax),%eax 400992: 3c 01 cmp $0x1,%al 400994: 74 e4 je 40097a 400996: eb 30 jmp 4009c8 400998: 48 8b 05 11 09 10 00 mov 1050897(%rip),%rax # 5012b0 40099f: c6 00 01 movb $0x1,(%rax) 4009a2: 48 8b 05 d7 08 10 00 mov 1050839(%rip),%rax # 501280 4009a9: c6 00 00 movb $0x0,(%rax) 4009ac: 48 8b 05 d5 08 10 00 mov 1050837(%rip),%rax # 501288 4009b3: 0f b6 00 movzbl (%rax),%eax 4009b6: 3c 01 cmp $0x1,%al 4009b8: 75 0e jne 4009c8 4009ba: 48 8b 05 bf 08 10 00 mov 1050815(%rip),%rax # 501280 4009c1: 0f b6 00 movzbl (%rax),%eax 4009c4: 84 c0 test %al,%al 4009c6: 74 e4 je 4009ac 4009c8: 48 8b 15 d1 08 10 00 mov 1050833(%rip),%rdx # 5012a0 4009cf: 48 8b 05 ca 08 10 00 mov 1050826(%rip),%rax # 5012a0 4009d6: 8b 00 mov (%rax),%eax 4009d8: ff c0 inc %eax 4009da: 89 02 mov %eax,(%rdx) 4009dc: c9 leaveq 4009dd: c3 retq 00000000004009de : 4009de: 55 push %rbp 4009df: 48 89 e5 mov %rsp,%rbp 4009e2: 48 8b 15 b7 08 10 00 mov 1050807(%rip),%rdx # 5012a0 4009e9: 48 8b 05 b0 08 10 00 mov 1050800(%rip),%rax # 5012a0 4009f0: 8b 00 mov (%rax),%eax 4009f2: ff c8 dec %eax 4009f4: 89 02 mov %eax,(%rdx) 4009f6: 8b 05 b0 08 10 00 mov 1050800(%rip),%eax # 5012ac 4009fc: 85 c0 test %eax,%eax 4009fe: 7e 0c jle 400a0c 400a00: 48 8b 05 81 08 10 00 mov 1050753(%rip),%rax # 501288 400a07: c6 00 00 movb $0x0,(%rax) 400a0a: eb 0a jmp 400a16 400a0c: 48 8b 05 9d 08 10 00 mov 1050781(%rip),%rax # 5012b0 400a13: c6 00 00 movb $0x0,(%rax) 400a16: c9 leaveq 400a17: c3 retq 0000000000400a18 : 400a18: 55 push %rbp 400a19: 48 89 e5 mov %rsp,%rbp 400a1c: 48 8b 3d 75 08 10 00 mov 1050741(%rip),%rdi # 501298 400a23: e8 90 fd ff ff callq 4007b8 400a28: 85 c0 test %eax,%eax 400a2a: 74 0a je 400a36 400a2c: bf e0 0d 40 00 mov $0x400de0,%edi 400a31: e8 a2 fd ff ff callq 4007d8 400a36: 8b 3d 7c 08 10 00 mov 1050748(%rip),%edi # 5012b8 400a3c: ba 00 00 00 00 mov $0x0,%edx 400a41: be 00 00 00 00 mov $0x0,%esi 400a46: e8 2d fe ff ff callq 400878 400a4b: 83 f8 ff cmp $0xffffffffffffffff,%eax 400a4e: 75 0a jne 400a5a 400a50: bf e6 0d 40 00 mov $0x400de6,%edi 400a55: e8 7e fd ff ff callq 4007d8 400a5a: c9 leaveq 400a5b: c3 retq 0000000000400a5c : 400a5c: 55 push %rbp 400a5d: 48 89 e5 mov %rsp,%rbp 400a60: 48 83 ec 50 sub $0x50,%rsp 400a64: 48 8b 05 35 08 10 00 mov 1050677(%rip),%rax # 5012a0 400a6b: 8b 00 mov (%rax),%eax 400a6d: 83 f8 01 cmp $0x1,%eax 400a70: 74 6a je 400adc 400a72: 48 8b 05 27 08 10 00 mov 1050663(%rip),%rax # 5012a0 400a79: 8b 08 mov (%rax),%ecx 400a7b: 8b 15 27 08 10 00 mov 1050663(%rip),%edx # 5012a8 400a81: 8b 35 25 08 10 00 mov 1050661(%rip),%esi # 5012ac 400a87: bf f0 0d 40 00 mov $0x400df0,%edi 400a8c: b8 00 00 00 00 mov $0x0,%eax 400a91: e8 82 fd ff ff callq 400818 400a96: 8b 05 10 08 10 00 mov 1050640(%rip),%eax # 5012ac 400a9c: 85 c0 test %eax,%eax 400a9e: 7e 0b jle 400aab 400aa0: 8b 05 06 08 10 00 mov 1050630(%rip),%eax # 5012ac 400aa6: 89 45 b8 mov %eax,0xffffffffffffffb8(%rbp) 400aa9: eb 09 jmp 400ab4 400aab: 8b 05 df 07 10 00 mov 1050591(%rip),%eax # 501290 400ab1: 89 45 b8 mov %eax,0xffffffffffffffb8(%rbp) 400ab4: 48 8d 7d c0 lea 0xffffffffffffffc0(%rbp),%rdi 400ab8: 8b 55 b8 mov 0xffffffffffffffb8(%rbp),%edx 400abb: be 10 0e 40 00 mov $0x400e10,%esi 400ac0: b8 00 00 00 00 mov $0x0,%eax 400ac5: e8 9e fd ff ff callq 400868 400aca: 48 8d 7d c0 lea 0xffffffffffffffc0(%rbp),%rdi 400ace: e8 b5 fd ff ff callq 400888 400ad3: c7 45 bc 00 00 00 00 movl $0x0,0xffffffffffffffbc(%rbp) 400ada: eb 07 jmp 400ae3 400adc: c7 45 bc 01 00 00 00 movl $0x1,0xffffffffffffffbc(%rbp) 400ae3: 8b 45 bc mov 0xffffffffffffffbc(%rbp),%eax 400ae6: c9 leaveq 400ae7: c3 retq 0000000000400ae8
: 400ae8: 55 push %rbp 400ae9: 48 89 e5 mov %rsp,%rbp 400aec: 53 push %rbx 400aed: 48 83 ec 38 sub $0x38,%rsp 400af1: 89 7d e4 mov %edi,0xffffffffffffffe4(%rbp) 400af4: 48 89 75 d8 mov %rsi,0xffffffffffffffd8(%rbp) 400af8: be 7b 00 00 00 mov $0x7b,%esi 400afd: bf 1b 0e 40 00 mov $0x400e1b,%edi 400b02: e8 01 fd ff ff callq 400808 400b07: 89 45 f4 mov %eax,0xfffffffffffffff4(%rbp) 400b0a: 83 7d f4 ff cmpl $0xffffffffffffffff,0xfffffffffffffff4(%rbp) 400b0e: 75 14 jne 400b24 400b10: bf 26 0e 40 00 mov $0x400e26,%edi 400b15: e8 be fc ff ff callq 4007d8 400b1a: bf 01 00 00 00 mov $0x1,%edi 400b1f: e8 34 fd ff ff callq 400858 400b24: 8b 7d f4 mov 0xfffffffffffffff4(%rbp),%edi 400b27: ba 80 07 00 00 mov $0x780,%edx 400b2c: be 00 04 00 00 mov $0x400,%esi 400b31: e8 b2 fc ff ff callq 4007e8 400b36: 89 05 7c 07 10 00 mov %eax,1050492(%rip) # 5012b8 400b3c: 8b 05 76 07 10 00 mov 1050486(%rip),%eax # 5012b8 400b42: 83 f8 ff cmp $0xffffffffffffffff,%eax 400b45: 75 14 jne 400b5b 400b47: bf 2b 0e 40 00 mov $0x400e2b,%edi 400b4c: e8 87 fc ff ff callq 4007d8 400b51: bf 01 00 00 00 mov $0x1,%edi 400b56: e8 fd fc ff ff callq 400858 400b5b: 8b 3d 57 07 10 00 mov 1050455(%rip),%edi # 5012b8 400b61: ba 00 00 00 00 mov $0x0,%edx 400b66: be 00 00 00 00 mov $0x0,%esi 400b6b: e8 b8 fc ff ff callq 400828 400b70: 48 89 45 e8 mov %rax,0xffffffffffffffe8(%rbp) 400b74: 48 8b 45 e8 mov 0xffffffffffffffe8(%rbp),%rax 400b78: 48 89 05 19 07 10 00 mov %rax,1050393(%rip) # 501298 400b7f: 48 8b 45 e8 mov 0xffffffffffffffe8(%rbp),%rax 400b83: 48 83 f8 ff cmp $0xffffffffffffffff,%rax 400b87: 75 14 jne 400b9d 400b89: bf 32 0e 40 00 mov $0x400e32,%edi 400b8e: e8 45 fc ff ff callq 4007d8 400b93: bf 01 00 00 00 mov $0x1,%edi 400b98: e8 bb fc ff ff callq 400858 400b9d: 48 8b 45 e8 mov 0xffffffffffffffe8(%rbp),%rax 400ba1: 48 89 c7 mov %rax,%rdi 400ba4: ba 00 04 00 00 mov $0x400,%edx 400ba9: be 00 00 00 00 mov $0x0,%esi 400bae: e8 85 fc ff ff callq 400838 400bb3: 48 8b 45 e8 mov 0xffffffffffffffe8(%rbp),%rax 400bb7: 48 89 05 c2 06 10 00 mov %rax,1050306(%rip) # 501280 400bbe: 48 8d 45 e8 lea 0xffffffffffffffe8(%rbp),%rax 400bc2: 48 ff 00 incq (%rax) 400bc5: 48 8b 45 e8 mov 0xffffffffffffffe8(%rbp),%rax 400bc9: 48 89 05 b8 06 10 00 mov %rax,1050296(%rip) # 501288 400bd0: 48 8d 45 e8 lea 0xffffffffffffffe8(%rbp),%rax 400bd4: 48 ff 00 incq (%rax) 400bd7: 48 8b 45 e8 mov 0xffffffffffffffe8(%rbp),%rax 400bdb: 48 89 05 ce 06 10 00 mov %rax,1050318(%rip) # 5012b0 400be2: 48 8d 45 e8 lea 0xffffffffffffffe8(%rbp),%rax 400be6: 48 ff 00 incq (%rax) 400be9: 48 8b 45 e8 mov 0xffffffffffffffe8(%rbp),%rax 400bed: 83 e0 07 and $0x7,%eax 400bf0: 48 85 c0 test %rax,%rax 400bf3: 74 10 je 400c05 400bf5: 48 8b 45 e8 mov 0xffffffffffffffe8(%rbp),%rax 400bf9: 48 83 e0 f8 and $0xfffffffffffffff8,%rax 400bfd: 48 83 c0 08 add $0x8,%rax 400c01: 48 89 45 e8 mov %rax,0xffffffffffffffe8(%rbp) 400c05: 48 8b 45 e8 mov 0xffffffffffffffe8(%rbp),%rax 400c09: 48 89 05 90 06 10 00 mov %rax,1050256(%rip) # 5012a0 400c10: 48 8d 45 e8 lea 0xffffffffffffffe8(%rbp),%rax 400c14: 48 83 00 04 addq $0x4,(%rax) 400c18: b8 00 00 00 00 mov $0x0,%eax 400c1d: e8 26 fc ff ff callq 400848 400c22: 89 05 68 06 10 00 mov %eax,1050216(%rip) # 501290 400c28: b8 00 00 00 00 mov $0x0,%eax 400c2d: e8 66 fb ff ff callq 400798 400c32: 89 05 74 06 10 00 mov %eax,1050228(%rip) # 5012ac 400c38: 8b 05 6e 06 10 00 mov 1050222(%rip),%eax # 5012ac 400c3e: 83 f8 ff cmp $0xffffffffffffffff,%eax 400c41: 75 14 jne 400c57 400c43: bf 38 0e 40 00 mov $0x400e38,%edi 400c48: e8 8b fb ff ff callq 4007d8 400c4d: bf 01 00 00 00 mov $0x1,%edi 400c52: e8 01 fc ff ff callq 400858 400c57: 8b 7d e4 mov 0xffffffffffffffe4(%rbp),%edi 400c5a: e8 49 fb ff ff callq 4007a8 400c5f: c7 05 3f 06 10 00 00 movl $0x0,1050175(%rip) # 5012a8 400c66: 00 00 00 400c69: eb 63 jmp 400cce 400c6b: e8 e8 fc ff ff callq 400958 400c70: e8 e7 fd ff ff callq 400a5c 400c75: 85 c0 test %eax,%eax 400c77: 74 62 je 400cdb 400c79: e8 4a fb ff ff callq 4007c8 400c7e: 89 c1 mov %eax,%ecx 400c80: c7 45 cc 1f 85 eb 51 movl $0x51eb851f,0xffffffffffffffcc(%rbp) 400c87: 8b 45 cc mov 0xffffffffffffffcc(%rbp),%eax 400c8a: f7 e9 imul %ecx 400c8c: c1 fa 05 sar $0x5,%edx 400c8f: 89 c8 mov %ecx,%eax 400c91: c1 f8 1f sar $0x1f,%eax 400c94: 89 d3 mov %edx,%ebx 400c96: 29 c3 sub %eax,%ebx 400c98: 89 5d d4 mov %ebx,0xffffffffffffffd4(%rbp) 400c9b: 6b 45 d4 64 imul $0x64,0xffffffffffffffd4(%rbp),%eax 400c9f: 89 ca mov %ecx,%edx 400ca1: 29 c2 sub %eax,%edx 400ca3: 89 55 d4 mov %edx,0xffffffffffffffd4(%rbp) 400ca6: 83 7d d4 00 cmpl $0x0,0xffffffffffffffd4(%rbp) 400caa: 75 0f jne 400cbb 400cac: bf 01 00 00 00 mov $0x1,%edi 400cb1: b8 00 00 00 00 mov $0x0,%eax 400cb6: e8 3d fb ff ff callq 4007f8 400cbb: e8 1e fd ff ff callq 4009de 400cc0: 8b 05 e2 05 10 00 mov 1050082(%rip),%eax # 5012a8 400cc6: ff c0 inc %eax 400cc8: 89 05 da 05 10 00 mov %eax,1050074(%rip) # 5012a8 400cce: 8b 05 d4 05 10 00 mov 1050068(%rip),%eax # 5012a8 400cd4: 3d 3f 42 0f 00 cmp $0xf423f,%eax 400cd9: 7e 90 jle 400c6b 400cdb: e8 38 fd ff ff callq 400a18 400ce0: b8 00 00 00 00 mov $0x0,%eax 400ce5: 48 83 c4 38 add $0x38,%rsp 400ce9: 5b pop %rbx 400cea: c9 leaveq 400ceb: c3 retq 400cec: 90 nop 400ced: 90 nop 400cee: 90 nop 400cef: 90 nop 0000000000400cf0 <__libc_csu_init>: 400cf0: 4c 89 64 24 e0 mov %r12,0xffffffffffffffe0(%rsp) 400cf5: 4c 89 6c 24 e8 mov %r13,0xffffffffffffffe8(%rsp) 400cfa: 49 89 d5 mov %rdx,%r13 400cfd: 4c 89 74 24 f0 mov %r14,0xfffffffffffffff0(%rsp) 400d02: 4c 89 7c 24 f8 mov %r15,0xfffffffffffffff8(%rsp) 400d07: 49 89 f6 mov %rsi,%r14 400d0a: 48 89 5c 24 d0 mov %rbx,0xffffffffffffffd0(%rsp) 400d0f: 48 89 6c 24 d8 mov %rbp,0xffffffffffffffd8(%rsp) 400d14: 48 83 ec 38 sub $0x38,%rsp 400d18: 41 89 ff mov %edi,%r15d 400d1b: e8 40 fa ff ff callq 400760 <_init> 400d20: 48 8d 05 d9 02 10 00 lea 1049305(%rip),%rax # 501000 <__fini_array_end> 400d27: 48 8d 15 d2 02 10 00 lea 1049298(%rip),%rdx # 501000 <__fini_array_end> 400d2e: 48 29 d0 sub %rdx,%rax 400d31: 49 89 c4 mov %rax,%r12 400d34: 49 c1 fc 03 sar $0x3,%r12 400d38: 75 26 jne 400d60 <__libc_csu_init+0x70> 400d3a: 48 8b 5c 24 08 mov 0x8(%rsp),%rbx 400d3f: 48 8b 6c 24 10 mov 0x10(%rsp),%rbp 400d44: 4c 8b 64 24 18 mov 0x18(%rsp),%r12 400d49: 4c 8b 6c 24 20 mov 0x20(%rsp),%r13 400d4e: 4c 8b 74 24 28 mov 0x28(%rsp),%r14 400d53: 4c 8b 7c 24 30 mov 0x30(%rsp),%r15 400d58: 48 83 c4 38 add $0x38,%rsp 400d5c: c3 retq 400d5d: 66 data16 400d5e: 66 data16 400d5f: 90 nop 400d60: 31 ed xor %ebp,%ebp 400d62: 48 89 d3 mov %rdx,%rbx 400d65: 48 ff c5 inc %rbp 400d68: 4c 89 ea mov %r13,%rdx 400d6b: 4c 89 f6 mov %r14,%rsi 400d6e: 44 89 ff mov %r15d,%edi 400d71: ff 13 callq *(%rbx) 400d73: 48 83 c3 08 add $0x8,%rbx 400d77: 4c 39 e5 cmp %r12,%rbp 400d7a: 72 e9 jb 400d65 <__libc_csu_init+0x75> 400d7c: eb bc jmp 400d3a <__libc_csu_init+0x4a> 400d7e: 66 data16 400d7f: 90 nop 0000000000400d80 <__libc_csu_fini>: 400d80: f3 c3 repz retq 400d82: 90 nop 400d83: 90 nop 400d84: 90 nop 400d85: 90 nop 400d86: 90 nop 400d87: 90 nop 400d88: 90 nop 400d89: 90 nop 400d8a: 90 nop 400d8b: 90 nop 400d8c: 90 nop 400d8d: 90 nop 400d8e: 90 nop 400d8f: 90 nop 0000000000400d90 <__do_global_ctors_aux>: 400d90: 55 push %rbp 400d91: 48 89 e5 mov %rsp,%rbp 400d94: 53 push %rbx 400d95: 48 83 ec 08 sub $0x8,%rsp 400d99: 48 8b 05 60 02 10 00 mov 1049184(%rip),%rax # 501000 <__fini_array_end> 400da0: 48 83 f8 ff cmp $0xffffffffffffffff,%rax 400da4: 74 1a je 400dc0 <__do_global_ctors_aux+0x30> 400da6: bb 00 10 50 00 mov $0x501000,%ebx 400dab: 66 data16 400dac: 66 data16 400dad: 90 nop 400dae: 66 data16 400daf: 90 nop 400db0: ff d0 callq *%eax 400db2: 48 8b 43 f8 mov 0xfffffffffffffff8(%rbx),%rax 400db6: 48 83 eb 08 sub $0x8,%rbx 400dba: 48 83 f8 ff cmp $0xffffffffffffffff,%rax 400dbe: 75 f0 jne 400db0 <__do_global_ctors_aux+0x20> 400dc0: 48 83 c4 08 add $0x8,%rsp 400dc4: 5b pop %rbx 400dc5: c9 leaveq 400dc6: c3 retq 400dc7: 90 nop Disassembly of section .fini: 0000000000400dc8 <_fini>: 400dc8: 48 83 ec 08 sub $0x8,%rsp 400dcc: e8 1f fb ff ff callq 4008f0 <__do_global_dtors_aux> 400dd1: 48 83 c4 08 add $0x8,%rsp 400dd5: c3 retq